With the development of semiconductor technology, the integration level of the ultra-large-scale integration (ULSI) has reached a scale of hundreds of millions to billions devices on one chip, and two or more layers of metal interconnections have been widely applied. The conventional interconnections are made of aluminum. However, with the continuous shrinkage of the critical dimension of the semiconductor devices in integrated circuits, the circuit density of metal interconnections has been continuously increased; and the required response time has been continuously decreased, thus the conventional aluminum metal interconnections are unable to match the requirements of the development of ULSI. After the technology node becomes lower than 130 nm, copper interconnections have replaced the aluminum interconnections. Comparing with the aluminum interconnections, the lower resistivity of copper can lower the resistance-capacitance (RC) delay of the interconnection lines, thus the electro migration may be improved; and the stability of the devices may be improved. The state-of-art method for forming the copper metal interconnections is the embedding technology of the Damascene process.
The embedding technology of the Damascene process includes forming trenches and/or through holes in a low-K dielectric layer by an etching process; followed by filling the trenches and/or through holes using interconnection materials, such as copper, etc. The metals in the through holes of different low-K dielectric layers connect to each other, thus the copper interconnections are achieved.
In the above-mentioned process, after forming the trenches and/or the through holes, it may need to clean the surfaces of the trenches and/or the through holes to remove the residues of the etching process after etching the low-K dielectric layers. However, the metal interconnection materials under the through holes may be damaged and/or lost, thus the interconnection properties of subsequently formed interconnection structures may be affected. The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems.